Product Features:
1. Dual-architecture dual-core processor with a maximum clock speed of 150 MHz and 520 KB of on-chip SRAM.
2. Equipped with programmable I/O and a comprehensive set of peripheral interfaces, offering flexible and powerful hardware expansion capabilities.
3. Supports up to 16MB of external QSPI flash memory, with storage options available on demand for greater flexibility.
4. Supports multiple low-power modes, suitable for extended battery-powered operation.
5. Supports both host and device modes, making it easy for beginners to get started.Product Overview:
The RP2350 is a high-performance, secure, low-cost, and user-friendly microcontroller. It features large on-chip memory, a symmetric dual-core processor, a deterministic bus architecture, and a rich set of peripherals. Equipped with our unique Programmable I/O (PIO) subsystem, it offers professional users unparalleled power and flexibility. The RP2350 comes with comprehensive documentation, a fully ported MicroPython implementation, and a UF2 bootloader in ROM, providing the lowest barrier to entry for beginners and hobbyists. The RP2350 is a stateless device that supports cache-in-place execution from external QSPI memory. This design choice allows you to select non-volatile storage of the appropriate density for your application. Manufactured using a modern 40nm process node, the RP2350 features high performance, low dynamic power consumption, and low leakage, and offers a variety of low-power modes to support extended battery-powered operation.Key Features:
Dual Cortex-M33 or Hazard3 processors, clocked up to 150MHz
520 KB of multi-bank high-performance SRAM
Support for up to 16 MB of off-chip flash memory via a dedicated QSPI bus
DMA controller
Fully connected AHB crossbar
On-chip programmable LDO for core voltage generation
2 on-chip PLLs for generating USB and core clocks
30 GPIO pins, 4 of which can be used as analog inputs
2 UARTs
2 SPI controllers
2 I2C controllers
24 PWM channels
USB 1.1 controller and PHY, supporting host and device modes
3 programmable I/O (PIO) blocks, totaling 12 state machinesSecurity:
The RP2350 features a comprehensive security architecture built around Arm TrustZone for Cortex-M, including the following features:
Support for signed boot
8 KB on-chip anti-fuse one-time programmable (OTP) memory
SHA-256 acceleration
Hardware true random number generator (TRNG)
Architecture Switching:
The RP2350 includes a pair of open-source Hazard3 RISC-V cores that can replace the Cortex-M33 core at boot time. Our boot ROM
can even automatically detect the architecture of the built Stage 2 binary and reboot the chip into the corresponding mode. With the exception of a few
security features and the double-precision floating-point accelerator, all chip features are available in RISC-V mode.Product List:
1x Development Board
3x Pin Header
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